Porting x86 assembly that is used to increment a value

I'm working on a port of some existing inline x86_64 assembly code to AArch64 compatible assembly and would appreciate the feedback. I'll post below the original x86 and my ported AArch64 code.

The purpose of the original x86 code is to increment a long/double value and handle overflow. My main concern is that due to differences in syntax between the two architectures, I may be missing a step in my AArch64 code that was present in x86.

x86 Assembly

__asm__(
"incq (%0)\n\t"
"jno  0f\n\t"
"movl $0x0, (%0)\n\t" "movl$0x43e00000, 0x4(%0)\n\t"
"movb %1, %c2(%0)\n"
"0:"
:
: "r"(&op1->value),
"n"(IS_DOUBLE),
"n"(ZVAL_OFFSETOF_TYPE)
: "cc");


AARch64 Assembly

__asm__(
"bvc  0f\n\t"
"mov %0, #0x0\n\t"
"ldr x3, [%0, 0x4]\n\t"
"mov x3, #0x43e00000\n\t"
"ldr x3, [%0, %c2]\n\t"
"mov x3, %1\n\t"
"0:"
:
: "r"(&op1->value),
"n"(IS_DOUBLE),
"n"(ZVAL_OFFSETOF_TYPE)
: "cc",
"x3");

• @JaDogg The code compiles so I don't believe there to be any syntax errors. My concern is that due to my lack of experience in the language, I may be incorrectly implementing the x86 code in my AArch64 code. – Grice Mar 29 '15 at 18:02