I have a Makefile, which should when calling
make just call
make in a list of subdirectories. The subdirectories should not be automatically detected but are fine to be hard coded (
Submodule3 below). Furthermore, if I call
Tool1 should be built (i.e. the directory names should be recognised as targets).
At this top level I have no use for dependency checking, the
Makefiles in the subdirectories take care of that. My current version looks like this:
subdirs := Tool1 Package2 Submodule3 .PHONY: all clean $(subdirs) all: clean: define makesubdir $(1): make -C $(1) all: $(1) endef define makesubdirclean $(1)-clean: make -C $(1) clean clean: $(1)-clean endef $(foreach SUBDIR,$(subdirs),$(eval $(call makesubdir,$(SUBDIR)))) $(foreach SUBDIR,$(subdirs),$(eval $(call makesubdirclean,$(SUBDIR))))
What I already considered:
I don't want a for loop in the
alltarget, to allow parallel building with
make -j. An older version read like:
all: for DIR in $(subdirs); do make -C $$DIR ; done
The subdirectories should be defined only in one place, adding a new subdirectory should happen only on one place.
The subdirectories are
makegets called in them, regardless of the directory's timestamp.
all: $(subdirs)would be easier to read than
all: $(1)but that way only