Both of my loops only have one branch for the loop itself each, whereas your loop's code branches quite a lot, including a conditional branch. BranchConditional branch prediction is a notoriously difficult part of the processor, so less branches are better. (Other answers also reducedeliminated the amount of branchesconditional branch in several ways.)
Aside the conditional branch, you're also using an unconditional branch to now_rotate. This does not have the negative performance impact of a conditional branch, but it does make your solution be spaghetti code. The amount of labels you need (add_one) is another sign of spaghetti code. Here's how to reduce the spaghetti factor (while keeping the conditional branch):
shr eax, 0x1 ; Kick the right-most bit out ...
mov ebx, 0x0 ; Initialise register to a 0
jnc now_rotate ; If eax bit was a 0 jump to now_rotate
mov ebx, 0x1 ; Reset register to a 1
now_rotate:
This streamlines the control flow. However, if ebx
is initialised to zero then there is an easier way to get it to one. inc ebx
is (in 32-bit code segments) a one-byte opcode:
shr eax, 0x1 ; Kick the right-most bit out ...
mov ebx, 0x0 ; Initialise register to a 0
jnc now_rotate ; If eax bit was a 0 jump to now_rotate
inc ebx ; Increment register to a 1
now_rotate:
And it is yet easier to initialise to zero by using "xor with itself", which has a shorter encoding than mov ebx, imm32
, and is recognised as a zeroing idiom on modern processors. This clobbers the flags register, which means we cannot put it between the shift and the conditional jump. But we can swap the shift and zeroing to have the zero initialisation first:
xor ebx, ebx ; Initialise register to a 0
shr eax, 0x1 ; Kick the right-most bit out ...
jnc now_rotate ; If eax bit was a 0 jump to now_rotate
inc ebx ; Increment register to a 1
now_rotate:
Below your label now_rotate you shift the single bit into a mask to OR into the destination register. I shift the destination register by one place in each iteration instead. ThisYour way uses an additional register -- this is of course more a matter of taste. However,an issue for themy 16-bit implementation that runs out of registers sooner. The additional shifting of the single bit into a mask, needing an up-to-31-places shift, and applying that mask to the destination would also be much more complex with 16-bit registers than my solution's double-width shift.